2026年芯粒峰会（Chiplet Summit 2026）嘉宾演讲资料合集（共52套打包）

1、The professional home for the engineering and technology community worldwideIEEE PROPRIETARYieee.orgThe professional home for the engineering and technology community worldwideIEEE and the Future of 。

2、Archana Cheruliyil-Alphawave Semi,a Qualcomm Company Chiplets Everywhere:Why Robust D2D at 64G Matters for Scalable Architectures2Communication happens on the chip shorelineMonolithic die performance。

3、1H-103 Chiplet Summit 2026 LIGHTMATTERPhotonic Interposer Supports Terabit Chiplet-Based SystemsB-202:Die-to-Die Interfaces-6:New ApproachesBijan Nowroozi Head of Ecosystem Development2H-103 Chiplet 。

4、its about whats next.Silicon Catalyst:Catalyzing Chiplet StartupsNick Kepler-COOFebruary 18,2026Catalyzing Chiplet StartupsFebruary 18,2026 Chiplet Summit2its about whats next.its about whats next.Si。

5、Chiplet SummitChiplet SummitFebruary 17February 17-19,2026,Santa Clara,CA,USA19,2026,Santa Clara,CA,USAChiplet Packaging to Scale AIChiplet Packaging to Scale AIAditya Vaidya,Si-Pkg Arch and Customer。

6、Connecting the Future of ChipletsScott ShadleySNIA,Board of DirectorsDirector of Leadership Narrative,Solidigm2|SNIA.All Rights Reserved.2|SNIA,All Rights Reserved.How are Standards like Chiplets?Con。

7、Verification of a Silicon BridgeSatish Surana IntelSr.Principal Engineer in Advanced Packaging Technology and ManufacturingSadha Parasuraman IntelDesign Methodology EngineerMichael Walsh Siemens EDAT。

8、Die-to-Die Interconnect Defect Modeling&Repair ArchitectureMoiz Khan Anshuman Chandra Jonathan Gaudet Siemens 2026|Siemens Digital Industries Software|Tessent|Moiz Khan|2026-02-19Outline Die-to-D。

9、Early-Stage Thermal Simulation and Design Space Exploration of 3DIC SystemsDr.Subramanian Lalgudi*,Karthikk Sridharan*,Dr.Oscar Moguel*,Mike Walsh*,Kevin Rinebold*,and Steve McKinney*Siemens Digital 。

10、Tackling Electrical Complexity in UCIeCo-Simulation for RTL and Analog Models Luis E.RodriguezJonathan RamirezSiemens EDABackground:Analog vs Logic SimulationAnalog and Logic validation are typically。

11、Chiplets for EveryoneDAVID GLASCO|VP R&D,COMPUTE SOLUTIONS GROUP,CADENCE CHIPLETS SUMMIT|FEBRUARY 2026Democratizing Chiplet Technology in the Physical AI eraSSG 2026 Cadence Design Systems,Inc.Al。

12、Assuring SoC Power Integrity with Silicon CapacitorsMukund KrishnaSr.Manager,Product MarketingEmpower SemiconductorAgendaImpact of Chiplets on Power IntegritySilicon Capacitors Solve the ChallengePri。

13、Accelerating Chiplet Adoption Across ArchitecturesDominic Brown,Senior Principal Engineer,ArmApproach to Reusable Chiplets2Key standardization initiatives driving ecosystem collaboration Collaboratio。

14、#CS26#ChipletSummitWelcome to the 4thAnnual Chiplet Summit!Chuck Sobey,General ChairChief Scientist,ChannelScienceFebruary 18,2026Thank You,and Welcome All!Exhibitors/SponsorsOrganizers,Moderators,Ch。

15、Development Platforms for Edge ChipletsDmitriy GusevTechnical Director,Chiplet Platform Lead2/18/2026Copyright 2026 Menta S.A.S CONFIDENTIAL and PROPRIETARY MotivationChiplets are already ubiquitous 。

16、Multi-Protocol Integration and Verification Using UCIeAnunay Bajaj-Solutions Engineering ArchitectVarun Agrawal-Product Management DirectorFebruary 2026Legal DisclosureCONFIDENTIAL INFORMATIONThe inf。

17、Demonstrating Optical Data Paths with ChipletsSue Hung FungPrincipal Product Marketing Manager Alphawave Semi,a Qualcomm companyChen SunCo-Founder and VP of Silicon EngineeringAyar LabsOutlineOvervie。

18、LOW-POWER WITH UCIE:A PROTOCOL-CENTRIC APPROACH TO CHIPLET BASED SYSTEM DESIGNPresenter:Hemlata BistAuthors:Naveen Kumar Gupta,Mayank Bakshi,Hemlata Bist23Power Management Techniques45678910。

19、February 2026Ashley Stevens,Director of Product Management and MarketingChiplet Summit,Santa Clara Convention CenterEnabling Scalable Multi-Die Systems for AI,HPC,and Automotive ADAS 2026 Arteris,Inc。

20、Systematic Verification Strategy for UCIePresentersKatakam Bhargav,Nagendra VarmaContents2Introduction to UCIeComplexities in UCIe.Features used in UCIeIntroduction to JESD 204EChallenges FacedVerifi。

21、Engineering Resilient IC PackagesSudarshan Deo,Andras Vass-Varnai,Bharad Gundepudi3D IC Solutions EngineeringSiemens DISWMotivationReticle SizeHeterogeneous Intg.ModularizationCostYieldBandwidth(Memo。

22、Deepak ShankarFounder,Mirabilis DesignThe Coherence Wall:Rethinking Global Cache Across Chiplets(paper S26096)Overview of Mirabilis Design2EDA Software Company based in Silicon ValleyPartner for risk。

23、CPO:Enabling the path to I/O Density and EfficiencyTony MastroianniSenior Director 3D IC Solutions EngineeringSiemens EDAUnrestricted|Siemens 2026|Siemens Digital Industries SoftwareIndustry TrendsAI。

24、Chiplets with eFlash IPSession C-103Dave EgglestonSSTWhy Chiplets(part 1)?2Chiplets are needed to extend Moores LawWhy Chiplets(part 2)?3Chiplets beat Monolithic in Cost&Faster TTMAt smaller geom。

25、Using UCIe Channel Compliance Simulation for Understanding Substrate/Interposer Design TradeoffsJohn Caka1,Matt Leslie1,Randy Wolff1,Adrien Auge2Siemens EDA,AlphaWave SemiAGENDAWhy Chiplets,Why now?C。

26、Aniket Breed()(Global Marketing and Business Development,Intel Foundry)STCO-Driven System Foundry Approaches for ChipletPlatformsGlobal Business Development and Marketing2Intel Foundry DisclaimerAll 。

27、Scaling Chiplet Verification with Questa One Multi-Die Distributed SimulationKarim Ameziane-Director Product EngineeringFrom Monolithic SoCs to Multi-Die SystemsThe Next Architecture Shiftand a Verif。

28、Enabling Advanced Transceiver Verification for Chiplet ArchitecturesScott Wedge,Jessi Lipoth,and Lih-Jen Hou Siemens EDAFebruary 19th,2026The Chiplet ChallengeTest costs must be reduced to make chipl。

29、1H-103 Chiplet Summit 2026 LIGHTMATTERComposable Interconnect for 400 Gb/s/Lane AI Systems H-103 DesignBijan Nowroozi Head of Ecosystem Development2 2Master Slide TemplateH-103 Chiplet Summit 2026 LI。

30、Shivangi Agrawal,Product ManagerRohit Gupta,Sr Manager Ecosystem DevelopmentCloud AI BU,ArmThe Future of Silicon is Modular,Scalable,and Standardized ChipletsAgendaWhy Chiplets for the AI WorldWhy Ch。

31、Enabling Next-Gen Chiplets:UCIe Routing and SI on 8-Metal Silicon InterposerAlphawave SemiChiplet Summit 2026Mohammed Amaan ArabNirmal KshetrapalanAlphawave Semi A Leader in Chiplet Connectivity2Enab。

32、1/Chiplet Sumit 2026.proteanTecs.All rights reserved.February 2026Electronics Visibility.From Within.Nir SeverSenior Director of Business DevelopmentIn-Field Monitoring for Chiplet Designs via ML-Dri。

33、1Arms Open Chiplet Ecosystem for the Converged AI DatacenterArm KeynoteDirector Hardware Ecosystem,Cloud AIImran Yusuf20262AI is Redefining ComputeScaling of AI ModelsIncreased Demand for AI Applicat。

34、Commercial Space SWAP Savings with 2.5D Heterogeneous Integration of Intel 18A Stephanie PuschDeniz CivaySatish SuranaDavid DoanLalit GajareTressa MarquardtRavi GutalaDarin HeckendornBryan LaPointeHi。

35、Enabling Flexible Heterogeneous Integration with an eFPGA Chiplet on Intel 18ATrey Peterson QuickLogicIssy Kipnis,Tao Zhou Intel FoundryApplications are constrained by 3 competing requirements2eFPGA 。

36、Chiplet Advantages-Scaling Across Copper and OpticsSue Hung Fung Principal Product Marketing ManagerLogicI/OI/OI/OI/OI/OI/OI/OI/OHBMHBMHBMMemoryHBMMemoryMemoryMemoryBenefits and Drawbacks More logic,。

37、Telemetry as the Backbone of AI-Ready Infrastructure12Confidential|2025 Insyde Software2 2Company AI Compute Demands More Than Compute Explosive growth of AI workloads in cloud&edge.The global AI。

38、Design and Analysis of EMIB Silicon Bridge with Hatched Ground PlanesLynn Sloan,Keysight TechnologiesHeeSoo Lee,Keysight Technologies Ravi Gutala,Intel FoundryLalit Gajare,Intel FoundryXenofon Konsta。

39、UCIe Consortium 2026|Chiplet Summit 2026On-Package Chiplet Innovations with Universal Chiplet Interconnect ExpressTM(UCIeTM)Dr.Debendra Das SharmaChair of UCIe ConsortiumIntel Senior Fellow and Chief。

40、The Chiplet Market Today and Where Its HeadedJim HandyObjective AnalysisWhere Are Chiplets Used Today?That depends on what you call a chiplet!MCMMCMMCPMCPStackedStackedDiceDiceBigBigChipsChipsMixedMi。

41、Driving Chiplets Into ActionDrew Barbier,VP IP ProductsMIPS,a GlobalFoundries companyAll Rights ReservedFeb 18,2026Copyright 2026 MIPS,a GlobalFoundries Company.All Rights Reserved.2RISC-V at Foundry。

42、Chiplets for AI Data Centers:Challenges,Shift Left Strategies,3D,Co-Packaged OpticsRobert Kruger,Director of Product ManagementFebruary 2026Legal DisclosureCONFIDENTIAL INFORMATIONThe information con。

43、Accelerated Design Closure for Integrating Chiplets on EMIB-TSatish SuranaIntel FoundryEmbedded Multi-die Interconnect Bridge-T(EMIB-T)2 EMIB-T is an advanced package using interconnect bridges with 。

44、Scaling HPC in Hyperscale Datacenters with Chiplets and ProtocolsCo-authors:Hemlata Bist,Mayank Bakshi,Naveen Kumar GuptaProtocol synergy across package,rack,and cluster scalesModern Hyperscale datac。

45、Speakers:Archana Cheruliyil,John CakaFrom Simulation to Silicon:System Design Methodologies for Reliable 64G UCIe Chiplet InterconnectsDie-to-Die Interconnects for Disaggregated AI Silicon2COMPUTE TO。

46、UALink ChipletsVerification Approaches for Heterogeneous Accelerator InteroperabilityJustin Bunnell,VIP ArchitectRise of Compute-Intensive AIModern AI workloads demand immense computational power,req。

47、Thermal Aware Chiplet and Power Pins FloorplanningManaging Hotspots in Chiplet-Based 3D/2.5D IntegrationUnrestricted|Siemens 2025|Siemens Digital Industries SoftwareIyad RAYANE ()Motivation:Why 3D IC。

48、Multiphysics Modeling for Early Vulnerability MitigationLang Lin,Principal Product ManagerFebruary 2026Legal DisclosureCONFIDENTIAL INFORMATIONThe information contained in this presentation is the co。