1、1H-103 Chiplet Summit 2026 LIGHTMATTERPhotonic Interposer Supports Terabit Chiplet-Based SystemsB-202:Die-to-Die Interfaces-6:New ApproachesBijan Nowroozi Head of Ecosystem Development2H-103 Chiplet Summit 2026 LIGHTMATTERThe Shift In The Semiconductor Scaling EconomyAI ROI has shifted from transist
2、or to system based scaling.Source:Intel,Our World in Data,Alger.https:/ourworldindata.org/Moores Law refers to length of time that it takes for number of transistors per integrated circuit to double.Doubling time for Al refers to the length of time it takes to double the amount of compute or trainin
3、g utilized by Al programs.The calculation period used for Al training was 2012-2026.4X Improvement3 3Master Slide TemplateH-103 Chiplet Summit 2026 LIGHTMATTERTHE NETWORK IS BECOMING THE COMPUTER4H-103 Chiplet Summit 2026 LIGHTMATTERThe Trend:Extending the Die with IODIEDIEDIEDIEDIEDIEDIEDIEDIEMCM O
4、rganic SubstrateLogic+IO w D2DReticle LimitedEverything2.5D InterposerAbstracted+Disaggregated3D InterposerAbstracted+Disaggregated+Stacked(RDL etc)TransistorDIE ScalingIO Scaling3D IO Scaling5H-103 Chiplet Summit 2026 LIGHTMATTERINTER-CONNECTTRAYRACKCLUSTERCHIPLETDIEMore Than Moore:The Network Did
5、Become The ComputerScaleOutUpAcrossAt every level,from transistors to clusters,performance is governed by network efficiency.6H-103 Chiplet Summit 2026 LIGHTMATTERMORE GPUS NEED A LOT MORE I/OBig AI supercomputers require links.SERDES LANES IN AN NVLINK SCALE-UP DOMAIN8 GPUS 202272 GPUS 2024576 GPUS
6、 20257H-103 Chiplet Summit 2026 LIGHTMATTERThe interconnect bottleneckRents Rule8H-103 Chiplet Summit 2026 LIGHTMATTERNetworking Scaling:Faster and More Dense224G448G448G224G224G224G800G Link=16 Wires.1 TX channel:2 wires 0101011 RX channel:2 wires 010101 With Copper,this 102T switch ASIC uses 2040