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20250121_PreConE_Heinig.PDF

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1、Internal Use OnlyChiplet Summit 21 January 2025Andy Heinig,Kevin Yee,Jonathan Smith 2025 Cadence Design Systems,Inc.Cadence confidential.Internal use only.3 The promise of Chiplets&the challenges The Digital Twin The Chiplet reference platform Horus and the Digital TwinOutline 2024 Cadence Design Sy

2、stems,Inc.Cadence confidential.Internal use only.4The Promise of Chiplets&The Challenges 2025 Cadence Design Systems,Inc.Cadence confidential.Internal use only.5Challenges of Monolithic SoC DesignHardwareSoftwareVehicle SoftwareInfotainment SoftwareLinuxAndroidDOM0DOMnXenVehicle Service Sensors,etc.

3、Diagnostics,Calibration,ConfigurationEmergencyServicesUI with TTS and Speech RecognitionPhoneBTNAVCloud AppsWireless Display SyncStreaming Multi-mediaRadioSystem ServicesIPCIPCSystem ServicesControl SoftwareEngineChassisBrakesElectricAUTOSAR RTESystem ServicesMemory ServicesComs ServicesI/O HW Abstr

4、actionComplex DriversAUTOSAR OSDev AbstractionMemory AbstractionComs AbstractionI/O HW DriversDev DriversMemory DriversComs DriversComplexity continues to increaseHardware is not complete until it works with the software and vice versaTeams cannot afford to work sequentially 2025 Cadence Design Syst

5、ems,Inc.Cadence confidential.Internal use only.6Software and Hardware Split is the Key ChallengeSource:International Business Strategies,Inc.Software&Verification 2025 Cadence Design Systems,Inc.Cadence confidential.Internal use only.7 Hardware and Software are equally critical to system success Har

6、dware is increasingly chiplet based to manage complexity Many chiplets are built upon Compute Subsystems for reusability Software is adopting containersto leverage cloud developmentpracticesChiplet FrameworkSystem ExampleSafety ChipletSECSCPUCIePCIeUCIeComputeChipletC CC CSRAMSRAMSRAMSECSAFSCPGPUGPU

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本文主要介绍了芯片级设计的新范式——芯片组(Chiplet)及其在现代电子系统设计中的挑战和机遇。核心数据包括:Chiplet技术能够通过模块化设计提升硬件的可重用性和灵活性,同时软件的容器化技术也促进了云开发实践的采用。文章强调了硬件和软件的协同作用,指出硬件设计直到与软件结合后才完整,且这两者的开发不能顺序进行。此外,数字双生(Digital Twin)技术被提出作为解决复杂系统设计挑战的方案,通过创建虚拟平台来模拟和验证硬件与软件的交互。Samsung Foundry与Cadence Design Systems合作,展示了基于5nm Tensilica Vision/AI芯片的参考设计系统,强调了从设计到硅验证的端到端EDA工具能力。最后,文章提到了使用数字双生进行NPU评估和系统性能分析的方法,展示了如何通过模拟来优化神经网络的性能和功耗。
"Chiplet技术带来了哪些挑战与机遇?" "数字双胞胎如何助力芯片设计优化与验证?" 数字双胞胎与软硬件协同创新"
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