1、ISSCC 2026SESSION 14Unusual Interconnects and Other Uses for Light14.1:THz-TSI:A 0.33pJ/b 264Gb/s Through-Silicon Interconnect Module for 3D Integration Utilizing Terahertz Coupling 2026 IEEE International Solid-State Circuits Conference1 of 38THz-TSI:A 0.33pJ/b 264Gb/s Through-Silicon Interconnect
2、Module for 3D Integration Utilizing Terahertz CouplingChen Jiang,Xiaodi Feng,Xiaohan Shen,Chixiao Chen,Qi Liu,Ming Liu and Ningsheng XuFudan University,Shanghai,China14.1:THz-TSI:A 0.33pJ/b 264Gb/s Through-Silicon Interconnect Module for 3D Integration Utilizing Terahertz Coupling 2026 IEEE Internat
3、ional Solid-State Circuits Conference2 of 38Outline Background and Motivations The Terahertz Thru-Silicon InterconnectThe THz-TSI Architecture The Reconfigurable TransceiverLO Generation and Wireless Synchronization Packaging Measurement Results Conclusions14.1:THz-TSI:A 0.33pJ/b 264Gb/s Through-Sil
4、icon Interconnect Module for 3D Integration Utilizing Terahertz Coupling 2026 IEEE International Solid-State Circuits Conference3 of 38Outline Background and Motivations The Terahertz Thru-Silicon InterconnectThe THz-TSI Architecture The Reconfigurable TransceiverLO Generation and Wireless Synchroni
5、zation Packaging Measurement Results Conclusions14.1:THz-TSI:A 0.33pJ/b 264Gb/s Through-Silicon Interconnect Module for 3D Integration Utilizing Terahertz Coupling 2026 IEEE International Solid-State Circuits Conference4 of 38The 3D Integration Technology10-100 xHBM Bandwidth(Compared with DDR5)50%M
6、emory Access Delay(Compared with DDR5)5-10 xComputing Density(Compared with single Processor)Heterogeneous Integration(Compared with single Processor)Address the“Memory Wall bottleneck.Nvidia GH200 SuperchipIntel 3D Processor FoverosBoost the computational capability.Achieve better AI training capab