Session13_Circuits for AI and AI for Circuits.pdf

1、ISSCC 2026SESSION 13Circuits for AI and AI for Circuits 2026 IEEE International Solid-State Circuits Conference1 of 3913.1:HYDAR:A 390K QPS,1574K QPS/W Hybrid Analog/Digital Compute-in-RRAM Accelerator for Efficient Recommendation SystemHYDAR:A 390K QPS,1574K QPS/W Hybrid Analog/Digital Compute-in-R

2、RAM Accelerator for Efficient Recommendation SystemJiaming Li1,Peng Yao1,Xueqi Li1,Zhenqi Hao1,Dabin Wu1,Zhouzheng Li1,Haishu Xianyu2,Lin Li3,Shujuan You4,Taiwei Chiu5,Maojia Sheng6,Wei Yang7,Qingtian Zhang1,Jianshi Tang1,He Qian1,Bin Gao1,Huaqiang Wu11Tsinghua University,2Beijing Elemem Technology,

3、3Migu Culture Technology,4China Mobile ResearchInstitute,5Xiamen Industrial Technology Research Institute,6Bytedance China,7Huawei Technologies 2026 IEEE International Solid-State Circuits Conference2 of 3913.1:HYDAR:A 390K QPS,1574K QPS/W Hybrid Analog/Digital Compute-in-RRAM Accelerator for Effici

4、ent Recommendation SystemOutline Introduction&Background Overall Architecture of HYDAR Key FeaturesHistogram-based SVS with Dynamic Latency ADCPrediction-based Preemptive Scheduling PipelineTwo-Step Coarse-Fine Retrieval Architecture Experiment Results Conclusion 2026 IEEE International Solid-State

5、Circuits Conference3 of 3913.1:HYDAR:A 390K QPS,1574K QPS/W Hybrid Analog/Digital Compute-in-RRAM Accelerator for Efficient Recommendation SystemOutline Introduction&Background Overall Architecture of HYDAR Key FeaturesHistogram-based SVS with Dynamic Latency ADCPrediction-based Preemptive Schedulin

6、g PipelineTwo-Step Coarse-Fine Retrieval Architecture Experiment Results Conclusion 2026 IEEE International Solid-State Circuits Conference4 of 3913.1:HYDAR:A 390K QPS,1574K QPS/W Hybrid Analog/Digital Compute-in-RRAM Accelerator for Efficient Recommendation SystemSimilarity Vector Search(SVS)for Re