主权、独立、创新：CEA 七年 RISC-V 软硬件协同设计经验.pdf

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1、Disposition:TitreSovereignty-Independence Innovation7 years of HW/SW codesign with RISC-V at CEAThomas Dombek thomas.dombekcea.frHead of CEAs LIST/DSCINDigital Systems and Integrated Circuits divisionThursday May 13th,2025,RISC-V Summit Europe,ParisDisposition:Titre et contenu1.Design activities at

2、CEA2.RISC-V,the obvious choice3.RISC-V related achievements4.PerspectivesMay 13th2025CEA-Thomas Dombek-RISC-V Summit 2025AgendaDisposition:Titre imageDesign activities at CEAFrom ultra-low-power(ULP)to high-performance computing(HPC)Raimundas Adobe StockDisposition:VideCEA in a glimpseSmart digital

3、systems21 000 employees 6 Billions of budget700industrial partners 650patents/yearMicro&nano-technologies1stglobalMost innovative organisationsGovernment&academic research2012,2013,2014,2015,2016,2017,2018,2019,2020,2022,2023,2024,2025May 13th2025CEA-Thomas Dombek-RISC-V Summit 2025Disposition:VideS

4、mart digital systemsMicro&nano-technologies11,700 sq.m of cleanroom space350 Industrial partners75 startups created3050 Patents in portfolio600 Publications per yearGrenobleIC platformParisEmbedded System platform100-200-300 mm wafers2500 Staff members CEA in a glimpseMay 13th2025CEA-Thomas Dombek-R

5、ISC-V Summit 2025Disposition:VideSmart digital systemsMicro&nano-technologiesGrenobleIC platformParisEmbedded System platformCEA in a glimpseMay 13th2025CEA-Thomas Dombek-RISC-V Summit 2025Lab-to-Fab Integrated Services from CEA:https:/ in designing state-of-the-art hardware architectures,systems-on

6、-chip,ASICS,and chiplets.2.Efficient development of reliable,secure,and low-power solutions tailored to your needs.3.Utilization of advanced design exploration tools and state-of-the-art design flows to turn your idea into a ready-to-manufacture circuit.4.Access to our cleanrooms for prototype manuf