RISC-V ISA 扩展及其在超维计算中的硬件加速.pdf

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1、RISC-V ISA Extensions with Hardware Acceleration for Hyperdimensional ComputingRocco Martino,PhD Candidaterocco.martinouniroma1.itRISC-V Summit Europe 2025.Paris,12-15 May.Outline2RISC-V Summit Europe 2025.Paris,12-15 May.RISC-V ISA Extension with Hardware Acceleration for HDCDIGITAL VLSICIRCUITS AN

2、D SYSTEMSRESEARCH GROUPIntroduction Hyperdimensional Computing Paradigm Why a custom extensionProposed Solution Klessydra T03 RISC-V Core The HDCUResults Hardware resource usage Speed up performanceMauro OlivieriOrdinary ProfessorFrancesco MenichelliAssistant ProfessorAntonio MastrandreaResearch Fel

3、lowAbdallah CheickResearch FellowMarcello BarbirottaResearch FellowSaeid JamiliPhD CandidateMarco AngioliPhD CandidateAndrea MarcelliPhD CandidateRocco MartinoPhD CandidateMarco PisaniPhD CandidateThe Hyperdimensional Computing paradigm for learning taskHyperdimensional Computing(HDC)1 is a consolid

4、ated computing paradigm that encodeinformation through distributed high-dimensional representations called hypervectors(HVs).3The mathematical space where HVs are manipulated is characterized by a very small set ofarithmetic vector operations:BindingBundlingPermutationSimilarity2DIGITAL VLSICIRCUITS

5、 AND SYSTEMSRESEARCH GROUPRISC-V Summit Europe 2025.Paris,12-15 May.RISC-V ISA Extension with Hardware Acceleration for HDC1 Kanerva,P.(2009).Hyperdimensional computing:An introduction to computing in distributed representation with high-dimensional random vectors.Cognitive Computation,1(2),139159.h

6、ttps:/doi.org/10.1007/s12559-009-9009-8By appropriately combining these operations it is possible to perform various learning taskssuch as classification,clustering and regression.4DIGITAL VLSICIRCUITS AND SYSTEMSRESEARCH GROUPRISC-V Summit Europe 2025.Paris,12-15 May.RISC-V ISA Extension with Hardw