Monte Cimone v2：RISC-V 高性能计算机之路.pdf

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1、Emanuele Venieri1,Simone Manoni1,Giacomo Madella1,Federico Ficarelli2,Daniele Gregori3,Daniele Cesarini2,Luca Benini1,4,Andrea Bartolini1emanuele.venieri2unibo.it1University of Bologna,Italy,2CINECA,Italy,3E4 Company S.p.A.,4ETH Zrich SwitzerlandMonte Cimone v2:Down the Road ofRISC-V High-Performanc

2、e ComputersRISC-V Summit Europe 202514.05.2025Outline RISC-V&HPC Monte Cimone Performance evaluation BLAS vectorization ResultsRISC-V Summit Europe 202514.05.2025RISC-V&HPC RISC-V is mature in embedded domain How to foster RISC-V ISA uptake in HPC?HPC platform requirements:High core count+vector/mat

3、rix extensions Large amount of system memory PCIe support(accelerators,network cards,fast storage)Software:OS,job schedulers,monitoring systems,packages and librariesRISC-V Summit Europe 202514.05.2025RISC-V HPC timelinetimeSiFive Freedom U740E4 RV007 Server BladesMonte Cimone v1Sophgo Sophon SG2042

4、Milk-V Pioneer BoxE4 RSV10 dual socket serverMonte Cimone v2202020222023202420252021RVV 0.7.1RVV 1.0RVA23First RISC-V PC 4 core system RV64GC16 GB DDR4PCIe Gen 3Linux readyTwo SiFive Freedom U740Server form factorFirst RISC-V clusterFour E4 RV007 blades32 cores in total+128 GB distributed system mem

5、oryScope:infrastructure+software validationFirst server class platform64 cores RV64GC_0p7V3-levels cache systemECC DDR4 memory32 PCIe Gen 4 lanesSingle socket SG2042128 GB RAMDual socket SG2042256 GB RAM AME/IMESiFive Freedom U740E4 RV007 Server BladesMonte Cimone v1Sophgo Sophon SG2042Milk-V Pionee

6、r BoxE4 RSV10 dual socket serverRISC-V Summit Europe 202514.05.2025Monte Cimone v2 bring upNew SLURM partition3 Milk-V Pioneer Box1 E4 RSV10 Dual Socket RISC-V ServerStarting from Monte Cimone v1RISC-V Summit Europe 202514.05.2025Cluster environment SLURM Examon Shared NFS Spack+new tools New compil