HC2022.vortex.BlaiseTine.v01.pdf

1、Accelerating Graphic Rendering onProgrammable RISC-V GPUsBlaise Tine,Varun Saxena,Santosh Srivatsan,Joshua R.Simpson,FadiAlzammar,Liam Paul Cooper,Sam Jijina,Swetha Rajagoplan,TejaswiniAnand Kumar,Jeff Young,Hyesoon KimAbstract2|Graphics rendering remains one of the most compute-intensive and memory

2、-bound applications of GPUs and has been driving their push for performance and energy efficiency since its inception.Early GPU architectures focused only on accelerating graphics rendering and implemented dedicated a fixed-function rendering units.Todays GPUs have become more programmable to addres

3、s the complexity and diversity of modern graphics workloads while still accelerating several components of the graphics pipeline in fixed-function hardware.|Generalizing the GPU microarchitecture and implement some of its graphics hardware blocks in software can save area that can be used to expand

4、the generic pipeline,especially in mobile systems-on-chips environments where power and area is scarce.|In this work,we propose a RISC-V-based hybrid GPU architecture that accelerates the graphics pipeline without paying the cost of a full hardware graphics pipeline.We evaluated the design on an Alt

5、era Arria 10 FPGA running at 200 MHz.Motivations3|GPU Acceleration for edge computingGPU has many applications e.g.Graphics,ML,Crypto,graphs,etc.General pipeline optimization improve all applicationsSpecialized components improve single applicationsFixed-function area is mainly for graphicsCan we tr

6、ade graphics area for more cores?GPUResearchRISC-VISALLVM CompilerFPGAOpenCLVulkanMotivations(2)4|Research in GPU Hardware ArchitectureGraphics hardware research beyond simulationFull stack open-source frameworkRISC-V ISA extension for graphicsOpen-source Vulkan software stackGPU