MHS DC-SCM 2.x 和 3.0 工作流程 - 当前进展及未来展望.pdf

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1、Tim Lambert,Sr.Distinguished Engineer,Dell TechnologiesJavier Lasa,Platform Architect,IntelMHS DC-SCM 2.x and 3.0 Workstreams-Current Developments and Whats AheadMHS DC-SCM 2.x and 3.0 Workstreams-Current Developments and Whats AheadTim Lambert,Sr.Distinguished Engineer,Dell TechnologiesJavier Lasa,

2、Platform Architect,IntelSERVER:MODULAR HARDWARE SYSTEM(MHS)DC-DCM 2.x contributing companiesLTPI SpecificationLTPI SpecificationInterface PinoutInterface PinoutDC-SCM Specs OverviewDC-SCM 2.x SpecificationsDC-SCM 2.x SpecificationsBase SpecificationBase Specification3D Models3D ModelsHCC Design Spec

3、 Type 1HCC Design Spec Type 1HCC Design Spec Type 2HCC Design Spec Type 2DC-SCM 2.2 Specs UpdateBase SpecificationBase SpecificationNew Compact Form Factor(CFF)Definition 1U Systems AI Systems Short depth or Edge MHS SystemsAdded SFF-TA-1002 Rev 1.5 Compliance Details Fixed the wrong use of the FRU

4、Format field introduced in 2.1Minor fixes and clarifications added DC-SCM CFF ModelsCFF Volumetric Keep-In Zone Allows for stacked board designs,direct I/O cabling,use with existing HFF designsOptimized around connector keep-out to maximize design space(e.g.,mezzanine)3D Models3D ModelsDC-SCM CFF 85

5、 mm STP File DC-SCM CFF 165 mm STP File LTPI 1.2 Specification UpdateLTPI SpecificationLTPI SpecificationDC-SCM 2.2 LTPI Spec UpdatesAdded Link Lost definition for all statesAdded unexpected command and sub-frame handling Added clarification on Data Channel CRC Error handlingUpdated Timeout Definiti

6、on for Link Speed StateAdded a recommendation for clock compensation method to be used in LTPI implementations Minor Changes and ImprovementsSCM CPLDHPM FPGADC-SCMGPIO ChannelGPIOFrame T+1T0GPIOGPIOT+1T-1GPIOGPIOGPIOI2C ChannelI2CI2CI2CI2CI2CI2CUART ChannelUARTUARTUARTUARTUARTUARTOEM ChannelOEMOEMOE