DC-MHS模块化即插即用工作流程概述.pdf

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1、Todd Rosedahl,Director Systems and AI strategy,JabilKasper Wszolek,Principal Engineer,IntelPhillip Leech,Principal Technologist/Customer Architect,HPE DC-MHS Modular Plug-and-Play Workstream OverviewDC-MHS Modular Plug-and-Play Workstream OverviewTodd Rosedahl,Director Systems and AI strategy,JabilK

2、asper Wszolek,Principal Engineer,IntelPhillip Leech,Principal Technologist/Customer Architect,HPE IT InfrastructureOverview of Problems/Ecosystem Challenges ToddLong Term Vision and State of Affairs ToddSpecs Overview and Progress Update KasperCall to Action KasperAgendaOverview What and WhyWhat:Mix

3、/Match DC-SCMs,HPMs,Peripherals in an MHS inspired ChassisDifferent Vendors,CPU architectures,and technology generationsProvide full function solutions with seamless integration without co-designCommoditize non-value added platform enablementWhy:Ecosystem enablementSystems management infrastructure

4、integrationTTM for diverse host domain silicon:Intel,AMD,ARM,PowerPC,etc.Lower OpEx and CapEx to integrate and validate Generational re-use of HW with cost&sustainability benefitsEnable new CPU,Memory&IO technologies more easilyEnable customer specific value-add and security solutionsROTBMCBIOSLTPIS

5、CMCPLDDifferent:Host Silicon:Intel,AMD,ARM,PowerPC,RISC-V,GPUs,Memory TypesSensors:Temperature,Power,etc.Peripherals:Device classes&typesBus topologies:Behind Muxes perhapsICs:Approved Vendor List.Thermal requirements:Fan control,Throttle,ShutdownChallenge:HPM(and beyond)content discovery and config

6、StandardizationEvery HPM has X sensor at Y location to be used for Z purposeDoable for some things,but not practical for allNew BMC FW developed and loaded for each HPMBMC identifies the HPM and loads the correct images(BIOS,FPGAs)Requires co-design,high level of effortDiscover devicesBMC can“walk”c