20260218_A-102_Sever.PDF

1、1/Chiplet Sumit 2026.proteanTecs.All rights reserved.February 2026Electronics Visibility.From Within.Nir SeverSenior Director of Business DevelopmentIn-Field Monitoring for Chiplet Designs via ML-Driven On-Die Telemetry2 /Chiplet Sumit 2026.proteanTecs.All rights reserved.The New Frontier:Chiplet Ba

2、sed AI ArchitecturesThe rapid shift to chiplet-based AI acceleration is driven by four core pillars:Heterogeneous Dies:Mixing process nodes for optimized logic and I/OCompute Dies:Complex,ultra high speed,multi-core,and mission criticalStacked Memories(HBM):Massive bandwidth directly adjacent to the

3、 computeUltra-Fast Interconnects:Delivering the low-latency communication requiredfor AI workloads3 /Chiplet Sumit 2026.proteanTecs.All rights reserved.AI Systems Challenges While performance and power have soared,system complexity has introduced critical physical blind spots Traditional test and va

4、lidation methods alone can no longer guarantee field reliability,power profiles,or efficient bring-upThermal StressLocalized hotspots from 3D stacking and high-density AI cores.Process VariationInconsistent performance across identical chipletsAccelerated AgingFaster degradation due to continuous,hi

5、gh-intensity workloadsDynamic Voltage DroopPerformance degradation due to continuous,high-intensity workloadsSDC is on the Rise1 Upasani,G.,Vera,X.,&Gonzalez,A.(2015).A case for acoustic wave detectors for soft errors.IEEE Transactions on Computers,65(1),518.Power Consumption is on the RiseUp to 60%

6、workload loss due to hardware failure 5 /Chiplet Sumit 2026.proteanTecs.All rights reserved.Its All About Timing VisibilityCombination logic(replication of the CP set by S1:SnCanary CircuitBest known methods often monitor design margins by proxy,and cannot provide accurate data about actual performa