1、AmPEC:Approximate MRAM with Partial Error Correction for Fine-grained Energy-quality Trade-off2025/1/2130th Asia and South Pacific Design Automation Conference1Lan-yang Sun1,Yaoru Hou2,Hao Cai11Southeast University,Nanjing,China2The Hong Kong University of Science and Technology,Hong Kong,COutline20
2、25/1/2130th Asia and South Pacific Design Automation Conference21Background2Proposed Approximate Scheme3Evaluation4Conclusion1Background2Proposed Approximate Scheme3Evaluation4Conclusion2025/1/2130th Asia and South Pacific Design Automation Conference3Outline1Background Approximate Design Paradigms
3、2025/1/2130th Asia and South Pacific Design Automation Conference4ReliabilityArea savingPerformanceEnergy savingExact designApprox.designApproximate DesignError-tolerant Applications+Save hardware cost Optimize latency Enhance energy efficiency Lose accuracytolerableCircuit-Level Approximation Techn
4、iquesData-PathMemoryVoltage OverscalingReducing Design ComplexityBit TruncationRead and Write Operations DroppingWeak Read and Write OperationsComputeMemorySystemAlgorithmArchitectureCircuit/LogicDesign Abstraction Levels.SRAMDRAMFlashSTT-MRAMPCMRRAMCell size120-150F210-30F210-30F210-30F210-30F210-3
5、0F2Non-volatilityYESNOYESYESYESYESWrite voltage1V1V10V1.5V3V3VWrite energyfJ10 fJ100 pJ1 pJ10 pJ1 pJStandby powerHIGHMEDIUMLOWLOWLOWLOWWrite speed1 ns10 ns0.1-1 ms5 ns10 ns10 nsRead speed1 ns3 ns10 ns5 ns10 ns10 nsEndurance10161016104-106101510121071Background Spin Transfer Torque-Magnetic RAM2025/1
6、/2130th Asia and South Pacific Design Automation Conference5High current,long access time Characteristics of various types of storage High energy consumption Approximate design for read/write access of MRAMBLWLSLBLWLSLAPPRLFLMgOAccess transistorMagnetic tunnel junction(MTJ)1Background STT-MRAM2025/1